L4/MIPS
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The R4x00 version of the L4 microkernel (L4/MIPS) developed at UNSW. The kernel consists of about 6,000 lines of assembler and 6,500 lines of C.

The kernel is stable since August 1997, with minor enhancements and bug fixes since. It has been tested on an R4600-based SGI Indy, on the Algorithmics P4000i prototyping board, as well as on the R4700-based U4600 system developed at UNSW as a research and teaching platform.

L4 is a general purpose microkernel implementing address spaces, threads and inter-process communication (IPC). Ports of L4 exist for other platforms also. See L4 Ports for details.

Present work on the kernel concentrates on performance issues, real-time capability, and further investigations of page table structures suitable for large, sparse address spaces. A new version of the kernel is under development where most of the VM management has been re-written. The new version will feature complete superpage support.

L4/Alpha authors

L4/MIPS was implemented by Kevin Elphinstone, a then PhD student at the University of New South Wales. Since late 1997, many students in the DiSy group have contributed bug fixes and minor enhancements.

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